File:Inverting full adder CMOS 24T.svg

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Original file (SVG file, nominally 550 × 390 pixels, file size: 26 KB)

Captions

Captions

A full adder in CMOS with intverted outputs, optimized for low-delay carry propagation

Summary

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Description
English: This full adder takes advantage of the fact that the results of a full adder are inverted when all inputs are inverted. This allows to save an inverter for carry propagation, a trick that has been utilized in the 6502, for example.
Date
Source Own work
Author Trex4321

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Date/TimeThumbnailDimensionsUserComment
current17:19, 5 September 2021Thumbnail for version as of 17:19, 5 September 2021550 × 390 (26 KB)Trex4321 (talk | contribs)Uploaded own work with UploadWizard

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