File:POWER5+-DCM.jpg
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| Description |
English: An illustration of IBM's POWER5+ microprocessor with a L3 cache chip mounted on a dual chip module (DCM). They are manufactured on a 90 nm copper SOI CMOS process mounted on a ceramic land grid array substrate. Inspiration for the image comes from numerous pictures on the Internet, IBM and privately owned photos. |
| Date | |
| Source | Own work |
| Author | Henriok |
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I, the copyright holder of this work, hereby publish it under the following license:
 
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This file is made available under the Creative Commons CC0 1.0 Universal Public Domain Dedication. |
| The person who associated a work with this deed has dedicated the work to the public domain by waiving all of their rights to the work worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law. You can copy, modify, distribute and perform the work, even for commercial purposes, all without asking permission.
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 20:55, 7 January 2014 | | 1,488 × 1,488 (594 KB) | Henriok (talk | contribs) | User created page with UploadWizard |
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